Operation As Timer Output - NEC mPD789101 User Manual

8.4.2 Operation as timer output

Timer outputs are repeatedly generated at the count value set to 16-bit compare register 20 (CR20) in advance
based on the intervals of the value set in TCL201 and TCL200.
To operate the 16-bit timer counter as a timer output, the following settings are required.
• Set P24 to output mode (PM24 = 0)
• Set P24 output latch to 0
• Set the count value to CR20
• Set 16-bit timer mode control register 20 (TMC20) as shown in Figure 8-6
Figure 8-6. Settings of 16-Bit Timer Mode Control Register 20 at Timer Output Operation
TOD20 TOF20 CPT201 CPT200 TOC20 TCL201 TCL200 TOE20
TMC20 –
Caution If both CPT201 flag and CPT200 flag are set to 0, the capture edge becomes operation prohibited.
When the count value of the 16-bit timer register 20 (TM20) matches the value set in CR20, the output status of
the TO20/P24/INTP1/TO80 pin is inverted. This enables timer output. At that time, TM20 count is continued and
an interrupt request signal (INTTM20) is generated.
Figure 8-7 shows the timing of timer output (see Table 8-3 for the interval time of the 16-bit timer counter).
Count clock
TM20 count value 0000H
CR20
INTTM20
Note
TO20
TOF20
Note The TO20 initial value becomes low level during output enable (TOE20 = 1).
Remark N = 0000H to FFFFH
112
CHAPTER 8 16-BIT TIMER COUNTER
0/1 0/1 0/1 1 0
Figure 8-7. Timer Output Timing
t
0001H N
N N
User's Manual U13045EJ2V0UM00
0/1 1
TO20 output enable
Setting of count clock (see Table 8-3)
Inverse enable of timer output data
FFFFH 0000H 0001H
N
Interrupt accept
Overflow flag set
N FFFFH
N N
Interrupt accept