Ppg Output Operation - NEC V850/SA1 mPD703015 Preliminary User's Manual

7.2.2 PPG output operation

Timer 0 can be used for PPG (Programmable Pulse Generator) output by setting the 16-bit timer mode control
register n (TMCn) and capture/compare control register n (CRCn) as shown in Figure 7-10.
The PPG output function outputs a square wave with a cycle specified by the count value set in advance to the
16-bit capture/compare register n0 (CRn0) and a pulse width specified by the count value set in advance to the 16-bit
capture/compare register n1 (CRn1).
Figure 7-10. Control Register Settings in PPG Output Operation
TMCn 0 0
CRCn 0 0
OSPTn
TOCn 0 0
Cautions 1. Make sure that 0000H ≤ CRn1 < CRn0 ≤ FFFFH is set to CRn0 and CRn1.
2. The pulse cycle generated by the PPG output is (Setting value of CRn0 + 1).
Duty is (Setting value of CRn1 + 1) / (Setting value of CRn0 + 1).
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CHAPTER 7 TIMER/COUNTER FUNCTION
(a) 16-bit timer mode control register 0, 1 (TMC0, TMC1)
TMCn3
0 0 1
(b) Capture/compare control register 0, 1 (CRC0, CRC1)
0 0 0
(c) 16-bit timer output control register 0, 1 (TOC0, TOC1)
OSPEn TOCn4 LVSn
0 1 0/1
TMCn2 TMCn1 OVFn
1 0 0
CRCn2 CRCn1 CRCn0
×
0 0
LVRn TOCn1 TOEn
0/1 1 1
Clears and starts on
coincidence between
TMn and CRn0.
× : don't care
CRn0 as compare
register
CRn1 as compare
register
Enables TOn output.
Reverses output on
coincidence between
TMn and CRn0.
Specifies initial value of
TOn output F/F.
Reverses output on
coincidence between
TMn and CRn1.
Disables one-shot pulse
output.