Block Diagram - Hitachi H8S/2646 Hardware Manual

• Module stop mode
 As the initial setting, PWM operation is halted. Register access is enabled by clearing
module stop mode.
17.1.2

Block Diagram

Figure 17-1 shows a block diagram of PWM channel 1.
Interrupt
request
Internal
data bus
Legend:
PWCR1:
PWOCR1:
PWPR1:
PWCNT1:
PWCYR1:
PWDTR1A, 1C, 1E, 1G: PWM duty registers 1A, 1C, 1E, 1G
PWBFR1A, 1C, 1E, 1G: PWM buffer registers 1A, 1C, 1E, 1G
612
ø, ø/2, ø/4, ø/8, ø/16
PWCR1
Compare
match
12 9 0 12 9
PWBFR1A
PWBFR1C
PWBFR1E
PWBFR1G
PWM control register 1
PWM output control register 1
PWM polarity register 1
PWM counter 1
PWM cycle register 1
Figure 17-1 Block Diagram of PWM Channel 1
PWCNT1
PWCYR1
0
PWDTR1A
PWDTR1C
PWDTR1E
PWDTR1G
Port
PWOCR1
control
PWPR1
PWM1A
P/N
PWM1B
P/N
PWM1C
P/N
PWM1D
P/N
PWM1E
P/N
PWM1F
P/N
PWM1G
P/N
PWM1H
P/N