Hitachi H8S/2646 Hardware Manual page 1053

TSR1—Timer Status Register 1
Bit 7
TCFD
Initial value 1
Read/Write R
Underflow Flag
0 [Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
1 [Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
Count Direction Flag
0 TCNT counts down
1
TCNT counts up
Note: * Can only be written with 0 for flag clearing.
6 5
— TCFU
1 0
— R/(W)*
Input Capture/Output Compare Flag A
Input Capture/Output Compare Flag B
0 [Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL bit of MRB in DTC is 0
• When 0 is written to TGFB after reading TGFB = 1
1 [Setting conditions]
• When TCNT = TGRB while TGRB is functioning as output compare register
• When TCNT value is transferred to TGRB by input capture signal while
TGRB is functioning as input capture register
Overflow Flag
0 [Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
1 [Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000)
H'FF25
4 3
TCFV —
0 0
R/(W)* —
0 [Clearing conditions]
• When DTC is activated by TGIA interrupt while DISEL bit
of MRB in DTC is 0
• When 0 is written to TGFA after reading TGFA = 1
1 [Setting conditions]
• When TCNT = TGRA while TGRA is functioning as output
compare register
• When TCNT value is transferred to TGRA by input capture
signal while TGRA is functioning as input capture register
2 1 0
— TGFB TGFA
0 0 0
— R/(W)* R/(W)*
TPU1
1021