Write Data Buffer Function - Hitachi H8S/2646 Hardware Manual

7.7

Write Data Buffer Function

The H8S/2646 Series has a write data buffer function in the external data bus. Using this function
enables external writes to be executed in parallel with internal accesses. The write data buffer
function is made available by setting the WDBE bit in BCRL to 1.
Figure 7-18 shows an example of the timing when the write data buffer function is used. When
this function is used, if an external write continues for 2 states or longer, and there is an internal
access next, only an external write is executed in the first state, but from the next state onward an
internal access (on-chip memory or internal I/O register read/write) is executed in parallel with the
external write rather than waiting until it ends.
Internal address bus
Internal read signal
A23 to A0
External
space
HWR, LWR
write
D15 to D0
Figure 7-18 Example of Timing when Write Data Buffer Function is Used
178
On-chip memory read Internal I/O register read
External write cycle
T T
1 2
Internal memory
External address
T T
W W
Internal I/O register address
T
3