Hitachi H8S/2646 Hardware Manual page 983

PWCR2—PWM Control Register 2
Bit 7
—
Initial value 1
Read/Write —
Interrupt Enable
0 Interrupt disabled
1 Interrupt enabled
Note: * Only 0 can be written, to clear the flag.
6 5 4
— IE CMF
1 0 0
— R/W R/(W)*
Counter Start
0
1
Compare Match Flag
0 [Clearing conditions]
• When 0 is written to CMF after reading CMF = 1
• When the DTC is activated by a compare match interrupt,
and the DISEL bit in the DTC's MRB register is 0
1 [Setting condition]
When PWCNT = PWCYR
H'FC10
3 2
CST CKS2
0 0
R/W R/W
Clock Select
0 0 0 Internal clock: counts on ø/1
1 Internal clock: counts on ø/2
1 0 Internal clock: counts on ø/4
1 Internal clock: counts on ø/8
1 Internal clock: counts on ø/16
* *
PWCNT is stopped
PWCNT is started
PWM2
1 0
CKS1 CKS0
0 0
R/W R/W
*: Don't care
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