Hitachi H8S/2646 Hardware Manual page 1102

EBR1—Erase Block Register 1
EBR2—Erase Block Register 2
EBR1
Bit 15
EB7
Initial value
Read/Write R/W
EBR2
Bit
—
Initial value
Read/Write R/W
FLPWCR—Flash Memory Power Control Register H'FFAC
Bit 7
PDWND
Initial value 0
Read/Write R/W
Power-Down Disable
0
1
1070
14 13
EB6 EB5
0 0 0
R/W R/W
7 6 5
— —
0 0 0
R/W R/W
Specify the flash memory erase area
Block (Size)
EB0 (1 kB)
EB1 (1 kB)
EB2 (1 kB)
EB3 (1 kB)
EB4 (28 kB)
EB5 (16 kB)
EB6 (8 kB)
EB7 (8 kB)
EB8 (32 kB)
EB9 (32 kB)
6 5
— —
0 0
R R
Transition to flash memory power-down mode enabled
Transition to flash memory power-down mode disabled
H'FFAA
H'FFAB
12 11 10
EB4 EB3 EB2
0 0
R/W R/W R/W
4
3
— — —
0 0
R/W R/W R/W
Addresses
H'000000–H'0003FF
H'000400–H'0007FF
H'000800–H'000BFF
H'000C00–H'000FFF
H'001000–H'007FFF
H'008000–H'00BFFF
H'00C000–H'00DFFF
H'00E000–H'00FFFF
H'010000–H'017FFF
H'018000–H'01FFFF
4 3 2
— — —
0 0 0
R R R
Flash Memory
Flash Memory
9 8
EB1 EB0
0 0 0
R/W R/W
2 1 0
EB9 EB8
0 0 0
R/W R/W
Flash Memory
1 0
— —
0 0
R R