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P2DDR and P2DR are initialized if a reset occurs and in the hardware standby mode, so the
content of PORT2 is determined by the pin states. The previous states are retained in the software
standby mode.
9.3.3
Pin Functions
The port 2 pins also function as TPU I/O pins (TIOCB5, TIOCA5, TIOCB4, TIOCA4, TIOCD3,
TIOCC3, TIOCB3, TIOCA3). The pin functions of port 2 change with the operating mode.
Table 9-5 lists the pin functions for port 2.
Table 9-5
Port 2 Pin Functions
Pin
Selection Method and Pin Functions
P27/TIOCB5
Switches as follows according to the combinations of the TPU channel 5
setting made using bits MD3 to MD0 of TMDR5, bits IOB3 to IOB0 of TIOR5,
and bits CCLR1 and CCLR0 of TCR5, as well as the P27DDR bit.
TPU Channel
5 Setting
P27DDR
Pin function
Note: * TIOCB5 input if MD3 to MD0 = 0, B'0000, B'01xx, and IOB = 1.
TPU Channel
5 Setting
MD3 to MD0
IOB3 to IOB0
CCLR1,
CCLR0
Output
function
234
Table Below (1)
—
TIOCB5 output
(2)
(1)
B'0000, B'01xx
B'0000
B'0001 to
B'0011
B'0100
B'0101 to
B'1xxx
B'0111
—
—
—
Output
compare
output
Table Below (2)
0
P27 input
TIOCB5 input *
(2)
(2)
B'0010
B'0011
—
B'xx00
Other than B'xx00
—
—
than B'10
—
—
mode 2
1
P27 output
(1)
(2)
Other
B'10
PWM
—
output
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