Next Data Registers H And L (Ndrh, Ndrl); Notes On Ndr Access - Hitachi H8S/2646 Hardware Manual

11.2.3

Next Data Registers H and L (NDRH, NDRL)

NDRH and NDRL are 8-bit readable/writable registers that store the next data for pulse output.
During pulse output, the contents of NDRH and NDRL are transferred to the corresponding bits in
PODRH and PODRL when the TPU compare match event specified by PCR occurs. The NDRH
and NDRL addresses differ depending on whether pulse output groups have the same output
trigger or different output triggers. For details see section 11.2.4, Notes on NDR Access.
NDRH and NDRL are each initialized to H'00 by a reset and in hardware standby mode. They are
not initialized in software standby mode.
11.2.4

Notes on NDR Access

The NDRH and NDRL addresses differ depending on whether pulse output groups have the same
output trigger or different output triggers.
Same Trigger for Pulse Output Groups: If pulse output groups 2 and 3 are triggered by the
same compare match event, the NDRH address is H'FE2C. The upper 4 bits belong to group 3
and the lower 4 bits to group 2. Address H'FE2E consists entirely of reserved bits that cannot be
modified and are always read as 1.
Address H'FE2C
Bit : 7
NDR15
Initial value : 0
R/W : R/W
Address H'FE2E
Bit : 7
—
Initial value : 1
R/W : —
If pulse output groups 0 and 1 are triggered by the same compare match event, the NDRL address
is H'FE2D. The upper 4 bits belong to group 1 and the lower 4 bits to group 0. Address H'FE2F
consists entirely of reserved bits that cannot be modified and are always read as 1. However, the
H8S/2646 Series has no output pins corresponding to pulse output groups 0 and 1.
6 5
NDR14 NDR13 NDR12
0 0
R/W R/W
6 5
— —
1 1
— —
4 3
NDR11 NDR10
0 0
R/W R/W R/W
4 3
— —
1 1
— —
2 1
NDR9 NDR8
0 0
R/W R/W
2 1
— — —
1 1
— — —
0
0
0
1
393