Operation In Power-Down Modes - Hitachi H8S/2646 Hardware Manual

Table 18-3 Output Levels
Data
M
Static Common output
Segment output
1/2 duty Common output
Segment output
1/3 duty Common output
Segment output
1/4 duty Common output
Segment output
18.3.3

Operation in Power-Down Modes

In the H8S/2646 Series, the LCD controller/driver can be operated even in the power-down
modes. The operating state of the LCD controller/driver in the power-down modes is summarized
in table 18-4.
In subactive mode, watch mode, and subsleep mode, the system clock oscillator stops, and
therefore, unless ø
SUB
be supplied and display will halt. Since there is a possibility that a direct current will be applied to
the LCD panel in this case, it is essential to ensure that ø
(medium-speed) mode, the system clock is switched, and therefore CKS3 to CKS0 must be
modified to ensure that the frame frequency does not change.
In the software standby mode the segment output and common output pins switch to high-
impedance status. In this case if a port's DDR or PCR bit is set to 1, a DC voltage could be applied
to the LCD panel. Therefore, DDR and PCR must never be set to 1 for ports being used for
segment output or common output.
0
0
V1
V1
V2, V3
V1
V3
V2
V3
V2
, ø /2, or ø /4 has been selected by bits CKS3 to CKS0, the clock will not
SUB SUB
0 1
1 0
V V1
SS
V V
SS SS
V2, V3 V1
V V
SS SS
V2 V1
V3 V
SS
V2 V1
V3 V
SS
, ø /2, or ø
SUB SUB
1
1
V
SS
V1
V
SS
V1
V
SS
V1
V
SS
V1
/4 is selected. In active
SUB
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