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Port C Open Drain Control Register (PCODR)
Bit
7
PC7ODR
Initial value
0
Read/Write
R/W
PCODR is an 8-bit readable/writable register and controls PMOS On/Off of each pin (PC7 to
PC0) of port C.
If PCODR is set to 1 by setting AE3 to AE0 in PFCR in mode other than address output mode,
port C pins function as NMOS open drain outputs and when the setting is cleared to 0, the pins
function as CMOS outputs.
Do not set PCODR to 1 if the pins are being used for LCD driver output.
PCODR is initialized to H'00 in reset mode or hardware standby mode. PCODR retains the last
state in software standby mode.
9.10.3
Pin Functions
Port C can function as LCD segment output pins (H8S/2646, H8S/2646R, H8S/2645: SEG8 to
SEG1, H8S/2648, H8S/2648R, H8S/2647: SEG24 to SEG17) and as address bus outputs. The pin
functions differ in modes 4, 5, 6, and 7. The port C pin functions are listed in table 9-20.
Table 9-20 Port C Pin Functions
Setting of
SGS3 to
SGS0
Operating
Modes
mode
4 and 5
PCnDDR
—
Pin function
A7 to A0
output
Note: Modes 4 and 5 are extended modes in which the internal ROM is disabled. Address output
is disabled when port C is set to segment output, so it is not possible to interface with
external ROM. Therefore port C must not be set to segment output in mode 4 or mode 5.
6
5
PC6ODR
PC5ODR
PC4ODR
0
0
R/W
R/W
Port
Mode 6
0
1
PC7 to
A7 to A0
PC0 input
output
4
3
PC3ODR
PC2ODR
0
0
R/W
R/W
Mode 7
0
1
PC7 to
PC7 to
PC0 input
PC0 output
2
1
PC1ODR
PC0ODR
0
0
R/W
R/W
R/W
SEG output
H8S/2646,
H8S/2648,
H8S/2646R,
H8S/2648R,
H8S/2645
H8S/2647
—
—
SEG8 to
SEG24 to
SEG1
SEG17
output
output
0
0
—
—
269
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