Hitachi H8S/2646 Hardware Manual page 270

Pin Selection Method and Pin Functions
P23/TIOCD3 Switches as follows according to the combinations of the TPU channel 3
setting made using bits MD3 to MD0 of TMDR3, bits IOD3 to IOD0 of TIOR3L,
and bits CCLR2 to CCLR0 of TCR3, as well as the P23DDR bit.
TPU Channel
3 Setting
P23DDR
Pin function
TPU Channel
3 Setting
MD3 to MD0
IOD3 to IOD0
CCLR2 to
CCLR0
Output
function
Note: * TIOCD3 output prohibited.
238
Table Below (1)
—
TIOCD3 output
(2) (1)
B'0000
B'0000 B'0001 to
B'0011
B'0100
B'0101 to
B'1xxx
B'0111
— —
— Output
compare
output
Table Below (2)
0
P23 input
TIOCD3 input
(2) (2)
B'001x B'0010
— Other Other than B'xx00
than
B'xx00
— —
— PWM
mode 1 mode 2
output*
1
P23 output
(1) (2)
B'0011
Other B'110
than
B'110
PWM —
output