Hitachi H8S/2646 Hardware Manual page 225

Hitachi 16-bit single-chip microcomputer h8s/2646 series
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The DTC transfer mode can be normal mode, repeat mode, or block transfer mode.
The 24-bit SAR designates the DTC transfer source address and the 24-bit DAR designates the
transfer destination address. After each transfer, SAR and DAR are independently incremented,
decremented, or left fixed.
Table 8-2 outlines the functions of the DTC.
Table 8-2
DTC Functions
Transfer Mode
Normal mode
 One transfer request transfers one
byte or one word
 Memory addresses are incremented
or decremented by 1 or 2
 Up to 65,536 transfers possible
Repeat mode
 One transfer request transfers one
byte or one word
 Memory addresses are incremented
or decremented by 1 or 2
 After the specified number of
transfers (1 to 256), the initial state
resumes and operation continues
Block transfer mode
 One transfer request transfers a block
of the specified size
 Block size is from 1 to 256 bytes or
words
 Up to 65,536 transfers possible
 A block area can be designated at
either the source or destination
Activation Source
IRQ
TPU TGI
SCI TXI or RXI
A/D converter ADI
Motor control PWM
timer CMI
HCAN RM0
(mail box 0)
Software
Address Registers
Transfer
Transfer
Source
Destination
24 bits
24 bits
193

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