Register Descriptions; Bus Width Control Register (Abwcr); Access State Control Register (Astcr) - Hitachi H8S/2646 Hardware Manual

7.2

Register Descriptions

7.2.1

Bus Width Control Register (ABWCR)

Bit :
ABW7
Modes 5 to 7
Initial value :
RW :
R/W
Mode 4
Initial value :
RW :
R/W
ABWCR is an 8-bit readable/writable register that designates each area for either 8-bit access or
16-bit access.
ABWCR sets the data bus width for the external memory space. The bus width for on-chip
memory and internal I/O registers is fixed regardless of the settings in ABWCR.
After a reset and in hardware standby mode, ABWCR is initialized to H'FF in modes 5, 6, 7, and
to H'00 in mode 4. It is not initialized in software standby mode.
Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select whether the
corresponding area is to be designated for 8-bit access or 16-bit access.
Bit n
ABWn Description
0 Area n is designated for 16-bit access
1 Area n is designated for 8-bit access
7.2.2

Access State Control Register (ASTCR)

Bit :
AST7
Initial value :
R/W : R/W
ASTCR is an 8-bit readable/writable register that designates each area as either a 2-state access
space or a 3-state access space.
144
7 6 5
ABW6 ABW5
1 1 1
R/W R/W
0 0 0
R/W R/W
7 6 5
AST6 AST5
1 1 1
R/W R/W
4 3
ABW4 ABW3 ABW2
1 1
R/W R/W R/W
0 0
R/W R/W R/W
4 3
AST4 AST3 AST2
1 1
R/W R/W R/W
2 1 0
ABW1 ABW0
1 1 1
R/W R/W
0 0 0
R/W R/W
(n = 7 to 0)
2 1 0
AST1 AST0
1 1 1
R/W R/W