Hitachi H8S/2646 Hardware Manual page 179

Bits 3 and 2—Area 5 Wait Control 1 and 0 (W51, W50): These bits select the number of
program wait states when area 5 in external space is accessed while the AST5 bit in ASTCR is set
to 1.
Bit 3 Bit 2
W51 W50
0 0
1
1 0
1
Bits 1 and 0—Area 4 Wait Control 1 and 0 (W41, W40): These bits select the number of
program wait states when area 4 in external space is accessed while the AST4 bit in ASTCR is set
to 1.
Bit 1 Bit 0
W41 W40
0 0
1
1 0
1
Description
Program wait not inserted when external space area 5 is accessed
1 program wait state inserted when external space area 5 is accessed
2 program wait states inserted when external space area 5 is accessed
3 program wait states inserted when external space area 5 is accessed
Description
Program wait not inserted when external space area 4 is accessed
1 program wait state inserted when external space area 4 is accessed
2 program wait states inserted when external space area 4 is accessed
3 program wait states inserted when external space area 4 is accessed
(Initial value)
(Initial value)
147