Table of Contents
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PADDR—Port A Data Direction Register
Bit
7
PA7DDR
Initial value
0
W
Read/Write
PBDDR—Port B Data Direction Register
Bit
7
PB7DDR
Initial value
0
Read/Write
W
PCDDR—Port C Data Direction Register
Bit
7
PC7DDR
Initial value
0
Read/Write
W
PDDDR—Port D Data Direction Register
Bit
7
PD7DDR
Initial value
0
Read/Write
W
978
6
5
PA6DDR
PA5DDR
PA4DDR
0
0
W
W
Specify input or output for each of the pins in port A
6
5
PB6DDR
PB5DDR
PB4DDR
0
0
W
W
Specify input or output for each of the pins in port B
6
5
PC6DDR
PC5DDR
PC4DDR
0
0
W
W
Specify input or output for each of the pins in port C
6
5
PD6DDR
PD5DDR
PD4DDR
0
0
W
W
Specify input or output for each of the pins in port D
H'FE39
4
3
2
PA3DDR
PA2DDR
0
0
0
W
W
W
H'FE3A
4
3
2
PB3DDR
PB2DDR
0
0
0
W
W
W
H'FE3B
4
3
2
PC3DDR
PC2DDR
0
0
0
W
W
W
H'FE3C
4
3
2
PD3DDR
PD2DDR
0
0
0
W
W
W
Port
1
0
PA1DDR
PA0DDR
0
0
W
W
Port
1
0
PB1DDR
PB0DDR
0
0
W
W
Port
1
0
PC1DDR
PC0DDR
0
0
W
W
Port
1
0
PD1DDR
PD0DDR
0
0
W
W
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