Hitachi H8S/2646 Hardware Manual page 430

Bit 5—Group 1 Inversion (G1INV): Selects direct output or inverted output for pulse output
group 1 (pins PO7 to PO4). However, the H8S/2646 Series has no pins corresponding to pulse
output group 1.
Bit 5
G1INV Description
0 Inverted output for pulse output group 1 (low-level output at pin for a 1 in PODRL)
1 Direct output for pulse output group 1 (high-level output at pin for a 1 in PODRL)
Bit 4—Group 0 Inversion (G0INV): Selects direct output or inverted output for pulse output
group 0 (pins PO3 to PO0). However, the H8S/2646 Series has no pins corresponding to pulse
output group 0.
Bit 4
G0INV Description
0 Inverted output for pulse output group 0 (low-level output at pin for a 1 in PODRL)
1 Direct output for pulse output group 0 (high-level output at pin for a 1 in PODRL)
Bit 3—Group 3 Non-Overlap (G3NOV): Selects normal or non-overlapping operation for pulse
output group 3 (pins PO15 to PO12).
Bit 3
G3NOV Description
0 Normal operation in pulse output group 3 (output values updated at compare match A
in the selected TPU channel)
1 Non-overlapping operation in pulse output group 3 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Bit 2—Group 2 Non-Overlap (G2NOV): Selects normal or non-overlapping operation for pulse
output group 2 (pins PO11 to PO8).
Bit 2
G2NOV Description
0 Normal operation in pulse output group 2 (output values updated at compare match A
in the selected TPU channel)
1 Non-overlapping operation in pulse output group 2 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
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