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20.12
Flash Memory and Power-Down States
In addition to its normal operating state, the flash memory has power-down states in which power
consumption is reduced by halting part or all of the internal power supply circuitry.
There are three flash memory operating states:
(1) Normal operating mode: The flash memory can be read and written to.
(2) Power-down mode: Part of the power supply circuitry is halted, and the flash memory can be
read when the LSI is operating on the subclock.
(3) Standby mode: All flash memory circuits are halted, and the flash memory cannot be read or
written to.
States (2) and (3) are flash memory power-down states. Table 20-21 shows the correspondence
between the operating states of the LSI and the flash memory.
Table 20-21 Flash Memory Operating States
LSI Operating State
High-speed mode
Medium-speed mode
Sleep mode
Subactive mode
Subsleep mode
Watch mode
Software standby mode
Hardware standby mode
20.12.1 Notes on Power-Down States
1. When the flash memory is in a power-down state, part or all of the internal power supply
circuitry is halted. Therefore, a power supply circuit stabilization period must be provided
when returning to normal operation. When the flash memory returns to its normal operating
state from a power-down state, bits STS2 to STS0 in SBYCR must be set to provide a wait
time of at least 20 µs (power supply stabilization time), even if an oscillation stabilization
period is not necessary.
2. In a power-down state, FLMCR1, FLMCR2, EBR1, EBR2, RAMER, and FLPWCR cannot be
read from or written to.
Flash Memory Operating State
Normal mode (read/write)
When PDWND = 0: Power-down mode (read-only)
When PDWND = 1: Normal mode (read-only)
Standby mode
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