Section 10 16-Bit Timer Pulse Unit (Tpu); Overview; Features - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series

Table of Contents

Section 10 16-Bit Timer Pulse Unit (TPU)

The H8S/2646 Series has an on-chip 16-bit timer pulse unit (TPU) that comprises six 16-bit timer

• Maximum 16-pulse input/output

 A total of 16 timer general registers (TGRs) are provided (four each for channels 0 and 3,

and two each for channels 1, 2, 4, and 5), each of which can be set independently as an

output compare/input capture register

 TGRC and TGRD for channels 0 and 3 can also be used as buffer registers

• Selection of 8 counter input clocks for each channel

• The following operations can be set for each channel:

 Waveform output at compare match: Selection of 0, 1, or toggle output

 Input capture function: Selection of rising edge, falling edge, or both edge detection

 Counter clear operation: Counter clearing possible by compare match or input capture

 Synchronous operation: Multiple timer counters (TCNT) can be written to simultaneously,

 PWM mode: Any PWM output duty can be set,

• Buffer operation settable for channels 0 and 3

 Input capture register double-buffering possible

 Automatic rewriting of output compare register possible

• Phase counting mode settable independently for each of channels 1, 2, 4, and 5

 Two-phase encoder pulse up/down-count possible

• Cascaded operation

 Channel 2 (channel 5) input clock operates as 32-bit counter by setting channel 1 (channel

4) overflow/underflow

Simultaneous clearing by compare match and input capture

synchronous operation

Maximum of 15-phase PWM output possible by combination with

synchronous operation