Hitachi H8S/2646 Hardware Manual page 1002

DTVECR—DTC Vector Register
Bit 7
SWDTE
Initial value 0
Read/Write R/(W)
DTC Software Activation Enable
0
1
Notes: *1 Only 1 can be written to the SWDTE bit.
*2 Bits DTVEC6 to DTVEC0 can be written to when SWDTE = 0.
970
6 5
DTVEC6 DTVEC5
0 0
*1 *2 *2
R/W R/W
DTC software activation is disabled
[Clearing condition]
• When the DISEL bit is 0 and the specified number of transfers
have not ended
• When 0s written to the DISEL bit after a software-activated data
transfer end interrupt (SWDTEND) request has been sent to
the CPU
DTC software activation is enabled
[Holding conditions]
• When the DISEL bit is 1 and data transfer has ended
• When the specified number of transfers have ended
• During data transfer due to software activation
H'FE1F
4 3
DTVEC4 DTVEC3 DTVEC2
0 0
*2 *2
R/W R/W
Specify a number for DTC software activation
2 1
DTVEC1 DTVEC0
0 0
*2 *2
R/W R/W R/W
DTC
0
0
*2