Hitachi H8S/2646 Hardware Manual page 1032

TCNT5—Timer Counter 5
Bit 15
Initial value 0
Read/Write R/W
Note: * These counters can be used as up/down-counters only in phase counting mode or
when counting overflow/underflow on another channel. In other cases they function
as up-counters.
TGR5A—Timer General Register 5A
TGR5B—Timer General Register 5B
Bit 15
Initial value 1
Read/Write R/W
TSTR—Timer Start Register
Bit 7
—
Initial value 0
Read/Write —
Note: If 0 is written to the CST bit during operation with the TIOC pin designated for output,
the counter stops but the TIOC pin output compare output level is retained. If TIOR is
written to when the CST bit is cleared to 0, the pin output level will be changed to the
set initial output value.
1000
14 13 12 11
0 0 0 0
R/W R/W R/W R/W R/W
14 13 12 11
1 1 1 1
R/W R/W R/W R/W R/W
6 5
— CST5
0 0
— R/W
H'FEA6
10 9 8 7 6
0 0 0 0 0
R/W R/W R/W R/W
Up/down-counter*
H'FEA8
H'FEAA
10 9 8 7 6
1 1 1 1 1
R/W R/W R/W R/W
H'FEB0
4 3
CST4 CST3
0 0
R/W R/W
Counter Start
0 TCNTn count operation is stopped
1 TCNTn performs count operation
5 4 3 2
0 0 0 0
R/W R/W R/W R/W R/W
5 4 3 2
1 1 1 1
R/W R/W R/W R/W R/W
2 1
CST2 CST1
0 0
R/W R/W
(n = 5 to 0)
TPU5
1 0
0 0
R/W
TPU5
TPU5
1 0
1 1
R/W
TPU
0
CST0
0
R/W