Usage Notes - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series

Table of Contents

Table 22-4 MSTP Bits and Corresponding On-Chip Supporting Modules

Note: Unlisted bits of the registers are reserved.

The write value must always be 1.

Usage Notes

DTC Module Stop: Depending on the operating status of the DTC, the MSTPA7 and MSTPA6

bits may not be set to 1. Setting of the DTC module stop mode should be carried out only when

the respective module is not activated.

For details, refer to section 8, Data Transfer Controller (DTC).

On-Chip Supporting Module Interrupt: Relevant interrupt operations cannot be performed in

module stop mode. Consequently, if module stop mode is entered when an interrupt has been

requested, it will not be possible to clear the CPU interrupt source or the DTC activation source.

Interrupts should therefore be disabled before entering module stop mode.

Writing to MSTPCR: MSTPCR should only be written to by the CPU.

Restrictions on Use in Medium-speed Mode: In medium-speed mode, registers of the HCAN,

LCD controller, and motor control PWM timer musts not be written to.

Data transfer controller (DTC)

16-bit timer pulse unit (TPU)

Programmable pulse generator (PPG)

A/D converter

Serial communication interface 0 (SCI0)

Serial communication interface 1 (SCI1)

Serial communication interface 2 (SCI2)

(H8S/2648, H8S/2648R, H8S/2647)

PC break controller (PBC)

Hitachi controller area network (HCAN)

Motor control PWM (PWM)

LCD controller/driver