is no high-level output period (no low-level output period when the corresponding bit in PWPR1
is set to 1).
PWCNT1
(lower 10 bits)
PWCYR1
(lower 10 bits)
PWDTR1
(lower 10 bits)
PWM output on
selected pin
PWM output on
unselected pin
Figure 17-4 Duty Register Compare Match (OPS = 0 in PWPR1)
PWCNT1
0
(lower 10 bits)
PWCYR1
(lower 10 bits)
PWDTR1
(lower 10 bits)
PWM output
(M = 0)
PWM output
(0 < M < N)
PWM output
(N ≤ M)
Figure 17-5 Differences in PWM Output According to Duty Register Set Value
0
1
N
M
1
(OPS = 0 in PWPR1)
Compare match
M–2
M–1
M
N
M
N–1
0
N–2
N–1
0
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