Hitachi H8S/2646 Hardware Manual page 1035

ABWCR—Bus Width Control Register
Bit
ABW7
Modes 5 to 7
Initial value
Read/Write R/W
Mode 4
Initial value
Read/Write R/W
Area 7 to 0 Bus Width Control
0
1
ASTCR—Access State Control Register
Bit 7
AST7
Initial value 1
Read/Write R/W
Area 7 to 0 Access State Control
0
1
7 6 5
ABW6 ABW5
1 1 1
R/W R/W
0 0 0
R/W R/W
Area n is designated for 16-bit access
Area n is designated for 8-bit access
6 5
AST6 AST5
1 1
R/W R/W
Area n is designated for 2-state access
Wait state insertion in area n external space is disabled
Area n is designated for 3-state access
Wait state insertion in area n external space is enabled
H'FED0
4 3
ABW4 ABW3 ABW2
1 1
R/W R/W
0 0
R/W R/W
(n = 7 to 0)
H'FED1
4 3
AST4 AST3 AST2
1 1
R/W R/W R/W
(n = 7 to 0)
Bus Controller
2 1
ABW1 ABW0
1 1
R/W R/W R/W
0
0
R/W R/W R/W
Bus Controller
2 1 0
AST1 AST0
1 1 1
R/W R/W
0
1
0
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