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22.6.3
Setting Oscillation Stabilization Time after Clearing Software Standby Mode
Bits STS2 to STS0 in SBYCR should be set as described below.
Using a Crystal Oscillator: Set bits STS2 to STS0 so that the standby time is at least 8 ms (the
oscillation stabilization time).
Table 22-5 shows the standby times for different operating frequencies and settings of bits STS2
to STS0.
Table 22-5 Oscillation Stabilization Time Settings
STS2
STS1
STS0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
: Recommended time setting
Note: * Do not use this setting.
Using an External Clock: The PLL circuit requires a time for stabilization. Insert a wait of 2 ms
min.
22.6.4
Software Standby Mode Application Example
Figure 22-3 shows an example in which a transition is made to software standby mode at the
falling edge on the NMI pin, and software standby mode is cleared at the rising edge on the NMI
pin.
In this example, an NMI interrupt is accepted with the NMIEG bit in SYSCR cleared to 0 (falling
edge specification), then the NMIEG bit is set to 1 (rising edge specification), the SSBY bit is set
to 1, and a SLEEP instruction is executed, causing a transition to software standby mode.
Software standby mode is then cleared at the rising edge on the NMI pin.
Standby Time
8192 states
16384 states
32768 states
65536 states
131072 states
262144 states
Reserved
16 states*
20
16
12
10
MHz
MHz
MHz
MHz
0.41 0.51 0.65 0.8
0.82 1.0
1.3
1.6
1.6
2.0
2.7
3.3
3.3
4.1
5.5
6.6
6.6
8.2
10.9 13.1 16.4 21.8 32.8
13.1 16.4 21.8 26.2 32.8 43.6 65.6
—
—
—
—
0.8
1.0
1.3
1.6
8
6
4
MHz
MHz
MHz Unit
1.0
1.3
2.0
ms
2.0
2.7
4.1
4.1
5.5
8.2
8.2
10.9 16.4
—
—
—
µs
2.0
1.7
4.0
743
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