Pin Functions - Hitachi H8S/2646 Hardware Manual

Port B Open Drain Control Register (PBODR)
Bit : 7
PB7ODR PB6ODR PB5ODR PB4ODR PB3ODR PB2ODR PB1ODR PB0ODR
Initial value : 0
R/W : R/W
PBODR is an 8-bit readable/writable register that controls the PMOS on/off state for each port B
pin (PB7 to PB0).
When pins are not address outputs in accordance with the setting of bits AE3 to AE0 in PFCR,
setting a PBODR bit makes the corresponding port B pin an NMOS open-drain output, while
clearing the bit to 0 makes the pin a CMOS output.
Do not set PBODR to 1 if the pins are being used for LCD driver output.
PBODR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
9.9.3

Pin Functions

Port B pins also function as LCD driver output pins (H8S/2646, H8S/2646R, H8S/2645: SEG16 to
SEG9, H8S/2648, H8S/2648R, H8S/2647: SEG32 to SEG25) and address bus outputs. The pin
functions differ between modes 4 to 6 and mode 7. Port B pin functions are shown in table 9-17.
Table 9-17 Port B Pin Functions
Setting of SGS3
to SGS0
Operating mode
Setting of AE3 to Address
AE0 output
enabled
PBnDDR
Pin function A15 to A8
output
264
6 5
0 0
R/W R/W
Port
Modes 4 to 6
Address output
disabled
— 0
PB7 to PB7 to
PB0 input PB0
output
4 3
0 0
R/W R/W
Mode 7
—
1 0
PB7 to PB7 to
PB0 input PB0
output
2 1
0 0
R/W R/W
SEG output
H8S/2646, H8S/2648,
H8S/2646R, H8S/2648R,
H8S/2645
—
—
1 —
SEG16 to
SEG9
output
0
0
R/W
H8S/2647
—
—
—
SEG32 to
SEG25
output