The DTC can release the bus after a vector read, a register information read (3 states), a single data
transfer, or a register information write (3 states). It does not release the bus during a register
information read (3 states), a single data transfer, or a register information write (3 states).
7.9
Resets and the Bus Controller
In a reset, the H8S/2646 Series, including the bus controller, enters the reset state at that point, and
an executing bus cycle is discontinued.
180