Ppg Output Control Register (Pcr) - Hitachi H8S/2646 Hardware Manual

Address H'FE2D
Bit : 7
NDR7
Initial value : 0
R/W : R/W
Address H'FE2F
Bit : 7
—
Initial value : 1
R/W : —
11.2.5

PPG Output Control Register (PCR)

Bit : 7
G3CMS1 G3CMS0 G2CMS1 G2CMS0 G1CMS1 G1CMS0 G0CMS1 G0CMS0
Initial value : 1
R/W : R/W
PCR is an 8-bit readable/writable register that selects output trigger signals for PPG outputs on a
group-by-group basis.
PCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 and 6—Group 3 Compare Match Select 1 and 0 (G3CMS1, G3CMS0): These bits
select the compare match that triggers pulse output group 3 (pins PO15 to PO12).
Bit 7 Bit 6
G3CMS1 G3CMS0
0 0
1
1 0
1
6 5
NDR6 NDR5 NDR4
0 0
R/W R/W
6 5
— —
1 1
— —
6 5
1 1
R/W R/W
Description
Output Trigger for Pulse Output Group 3
Compare match in TPU channel 0
Compare match in TPU channel 1
Compare match in TPU channel 2
Compare match in TPU channel 3
4 3
—
0 1
R/W —
4 3
— NDR3 NDR2
1 0
— R/W R/W
4 3
1 1
R/W R/W R/W
2 1
— — —
1 1
— — —
2 1
NDR1 NDR0
0 0
R/W R/W
2 1
1 1
R/W R/W
(Initial value)
0
1
0
0
0
1
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