Hitachi H8S/2646 Hardware Manual page 857

Table A-4 Number of States per Cycle
Cycle
Instruction fetch
Branch address read S
Stack operation
Byte data access
Word data access
Internal operation
Legend
m: Number of wait states inserted into external device access
On-Chip Supporting
Module
On-Chip 8-Bit
Memory Bus
S 1 4
I
J
S
K
S 2
L
S 4
M
S 1 1
N
Access Conditions
8-Bit Bus
16-Bit 2-State
Bus Access
2 4
2
4
1 1
External Device
16-Bit Bus
3-State 2-State 3-State
Access Access Access
6 + 2m 2 3 + m
3 + m
6 + 2m
1 1 1
825