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8.3.2
Activation Sources
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 8-3 shows activation source and
DTCER clearance. The activation source flag, in the case of RXI0, for example, is the RDRF flag
of SCI0.
Table 8-3
Activation Source and DTCER Clearance
Activation Source
Software activation The SWDTE bit is cleared to 0
Interrupt activation
Figure 8-3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Source flag cleared
On-chip
supporting
module
IRQ interrupt
DTVECR
Figure 8-3 Block Diagram of DTC Activation Source Control
194
When the DISEL Bit Is 0 and
the Specified Number of
Transfers Have Not Ended
The corresponding DTCER bit
remains set to 1
The activation source flag is
cleared to 0
Clear
DTCER
Select
Interrupt
request
When the DISEL Bit Is 1, or when
the Specified Number of Transfers
Have Ended
The SWDTE bit remains set to 1
An interrupt is issued to the CPU
The corresponding DTCER bit is cleared
to 0
The activation source flag remains set to 1
A request is issued to the CPU for the
activation source interrupt
Clear
controller
Clear request
DTC
Interrupt controller
Interrupt mask
CPU
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