Figure 10-47: Basic Operation Timing In One-Shot Pulse Mode - NEC V850E/PH2 User Manual

Figure 10-47: Basic Operation Timing in One-Shot Pulse Mode

FFFFH
Counter
TRnCE
TRnEST
External trigger
Note2
(TTRGR1 pin )
TRnCCR0
TRnCCR0
0000H
buffer
TRnCCR1
TRnCCR1
0000H
buffer
INTTRnCC0
INTTRnCC1
TORn1
one-shot pulse
output
TORn0
Notes: 1. Count up starts when the value of TRnEST becomes 1 or TTRGRn is input.
2. Trigger input available for TMR1 only (n = 1).
Remarks: 1. D0: Setting value of TRnCCR0 register (0000H to FFFFH)
D1: Setting value of TRnCCR1 register (0000H to FFFFH)
2. TORn1 (output delay) = (setting value of TRnCCR1 register) × (count clock cycle)
TORn1 (output pulse width) = {(setting value of TRnCCR0 register +1) - (setting value of
TRnCCR1 register)} × (count clock cycle)
3. n = 0, 1
Chapter 10 16-bit Inverter Timer/Counter R
(a) (TRnOE0, 1 = 1, TRnOL0, 1 = 0)
D0
Note1
D1
User's Manual U16580EE3V1UD00
D0
D1
D0 D0
D0
D1
D1
D0
D1
401