Figure 11-24: Basic Operation Timing In External Trigger Pulse Output Mode - NEC V850E/PH2 User Manual

Figure 11-24: Basic Operation Timing in External Trigger Pulse Output Mode

(a) When values of TTnCCR0 and TTnCCR1 registers are rewritten, TOTn0 and TOTn1
FFFFH
Counter
TTnCE
External trigger
(TTRGTn pin)
TTnCCR0
TTnCCR0
0000H
buffer
TTnCCR1
0000H
TTnCCR1
buffer
TOTn1
toggle output
TOTn0
toggle output
TTnRSF flag
Remarks: 1. D , D
01 02
D , D
11 12
2. TOTn1 (PWM) duty = (setting value of TTnCCR1 register) × (count clock cycle)
TOTn1 (PWM) cycle = (setting value of TTnCCR0 register + 1) × (count clock cycle)
3. Pin TOTn0 is toggled when the counter is cleared immediately following count start.
4. n = 0, 1
Chapter 11 16-bit Timer/Event Counter T
are output (TTnOE0, 1 = 1, TTnOL0, 1 = 0)
D
01
D
01
D
11
D
11
: Setting values of TTnCCR0 register (0000H to FFFFH)
: Setting values of TTnCCR1 register (0000H to FFFFH)
User's Manual U16580EE3V1UD00
D
01
D
12
D
11
D
02
D
02
D
02
D
12
D
12
497