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Chapter 12 16-bit 2-Phase Encoder Input Up/Down Counter/General Purpose Timer (TMENC10)
12.6.2 Clearing of count value upon occurrence of compare match
The internal operation during TMENC10 clear operation upon occurrence of a compare match is as
follows.
Figure 12-25: Count Value Clear Operation upon Compare Match
(rising edge set as valid edge)
Caution:
The operations at the next count clock after the count value of TMENC10 and the
CM100 set value match are as follows.
•
In case of up count: Clear operation is performed.
•
In case of down count: Clear operation is not performed.
Remark:
Items between parentheses in the above figure apply to down count operation.
12.6.3 Transfer operation
The internal operation during TMENC10 transfer operation is as follows.
Figure 12-26: Internal Operation During Transfer Operation
(rising edge set as valid edge)
Caution:
The count operations after the TMENC10 count value becomes 0000H are as follows.
•
In case of down count: Transfer operation is performed.
•
In case of up count: Transfer operation is not performed.
Remark:
Items between parentheses in the above figure apply to up count operation.
Count clock
TMENC1
FFFEH
CM10
Up count
Transfer operation is performed.
(Transfer operation is not performed.)
Count clock
TMENC1
0001H
CM10
Down count
User's Manual U16580EE3V1UD00
Clear TMENC1
(Not clear TMENC1)
0000H
0001H
FFFFH
(FFFEH)
(FFFDH)
FFFFH
Up count
(Down count)
FFFFH
FFFEH
0000H
(0001H)
(0002H)
FFFFH
Down count
(Up count)
567
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