Figure 14-5: A/D Converter N Trigger Source Select Register (Adtrseln) - NEC V850E/PH2 User Manual

(4) A/D converter n trigger source select register (ADTRSELn)
The ADTRSELn register is an 8-bit register that specifies the timer trigger signal in the timer
trigger mode (TRGn1, TRGn0 bits of ADMn1 register = 01B).
This register can be read or written in 8-bit units.
Reset input sets this register to 00H.
Caution: Before changing the setting of the ADTRSELn register, stop the A/D conversion oper-
ation (by clearing the ADCEn bit of the ADMn0 register to 0). The operation is not
guaranteed if the setting of the ADTRSELn register is changed while A/D conversion
is enabled (ADCEn bit = 1).

Figure 14-5: A/D Converter n Trigger Source Select Register (ADTRSELn)

After reset: 00H
7
ADTRSELn 0
(n = 0, 1)
TSELn3
0
0
0
0
0
0
0
0
1
Remark: n = 0, 1
580
Chapter 14 A/D Converter
R/W Address:
6 5
0 0
TSELn2 TSELn2 TSELn0
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
Others than above
User's Manual U16580EE3V1UD00
ADTRSEL0 FFFFF270H,
ADTRSEL1 FFFFF272H
4 3 2
0 TSELn3 TSELn2
Trigger Source Selection
in Timer Trigger Mode
0 None. All trigger sources are ignored.
1 TR0ADTRG0 signal (from TMR0)
0 TR0ADTRG1 signal (from TMR0)
1 TR1ADTRG0 signal (from TMR1)
0 TR1ADTRG1 signal (from TMR1)
1 INTTR0OD interrupt (from TMR0)
0 INTTR0CD interrupt (from TMR0)
1 INTTR1OD interrupt (from TMR1)
0 INTTR1CD interrupt (from TMR1)
Setting prohibited
1 0
TSELn1 TSELn0