Figure 20-64: Port Register Dl(Pdl) - NEC V850E/PH2 User Manual

(2) Control registers
(a) Port register DL (PDL)
The PDL register is a 16-bit register that controls reading the pin levels and writing the output
levels of port pins PDL0 to PDL15.
This register can be read or written in 16-bit units.
If the higher 8 bits of the PDL register are used as PDLH register, and the lower 8 bits as the PDLL
register, however, these registers can be read or written in 8-bit or 1-bit units.
Reset input causes an undefined register content.
After reset: Undefined
15 14
PDL PDL15 PDL14 PDL13 PDL12 PDL11 PDL10 PDL9 PDL8 PDL7 PDL6 PDL5 PDL4 PDL3 PDL2 PDL1 PDL0
After reset: Undefined
7
PDLL PDL7
After reset: Undefined
7
PDLH PDL15
PDLn
0
1
Remark: n = 0 to 15
946
Chapter 20 Port Functions

Figure 20-64: Port Register DL(PDL)

R/W Address:
13 12 11 10
PDLH
R/W Address:
6 5
PDL6 PDL5
R/W Address:
6 5
PDL14 PDL13
Input/Output Data Control of Pin PDLn
Input mode: Low level is input
Output mode: Low level is output
Input mode: High level is input
Output mode: High level is output
User's Manual U16580EE3V1UD00
FFFFF004H
9 8 7 6 5
FFFFF004H
4 3
PDL4 PDL3 PDL2
FFFFF005H
4 3
PDL12 PDL11 PDL10
4 3 2 1
PDLL
2 1 0
PDL1 PDL0
2 1 0
PDL9 PDL8
0