Memory Map; Figure 3-16: Memory Map Of Μpd70F3187 - NEC V850E/PH2 User Manual

3.4.4 Memory map

Areas are reserved in V850E/PH2 as shown in Figure 3-16. Each mode is specified by the MODE0 to
MODE2 pins.
Single-chip mode 0
xFFFFFFFH
On-chip peripheral
xFFFF000H
xFFFEFFFH
Access prohibited
xFFF8000H
xFFF7FFFH
Internal RAM area
xFFF0000H
xFFEFFFFH
Access prohibited
x4000000H
x3FFFFFFH
On-chip peripheral
I/O area mirror
x3FFF000H
x3FFEFFFH
Access prohibited
x3FF8000H
x3FF7FFFH
Internal RAM area
x3FF0000H
x3FEFFFFH
Access prohibited
x0200000H
x01FFFFFH
x0100000H
x00FFFFFH
Internal ROM area
x0000000H
Notes: 1. By setting the PMCAL, PMCAH, PMCDL, PMCDH, PMCCS, PMCCT, and PMCCD port
mode control registers to control mode, this area can be used as external memory area.
2. Accessing addresses 3FFF000H to 3FFFFFFH is prohibited. Specify addresses FFFF000H
to FFFFFFFH to access the on-chip peripheral I/O.
3. The operation is not guaranteed if an access-prohibited area is accessed.
Chapter 3 CPU Functions
Figure 3-16: Memory Map of
Single-chip mode 1
On-chip peripheral
I/O area
Note 2
Internal RAM area
Access prohibited
Note 1
On-chip peripheral
Note 2
I/O area mirror
Note 3
Access prohibited
Internal RAM area
mirror
External memory
Note 1
Internal ROM area
External memory
User's Manual U16580EE3V1UD00
μ
PD70F3187
ROMless mode
On-chip peripheral
I/O area
Internal RAM area
Note 1
Access prohibited
On-chip peripheral
Note 2
I/O area mirror
Note 3
Access prohibited
Internal RAM area
mirror
External memory
area
area
4 KB
I/O area
32 KB
Note 1
Note 2
Note 3
mirror
Program area
(64 MB)
area
1 MB
1 MB
101