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(e) Port emergency shut off status register 5 (ESOST5)
The ESOST5 register is an 8-bit register that indicates the emergency status control mode
(alternate function).
Writing to the ESOST5 register is only possible in a specific sequence, where a write access to the
command register (PRCMD) must be made before a write access to the ESOST5 register is
accepted. A read operation in between the two write operations is allowed, i.e. read-modify-write is
possible on register ESOST5. For details refer to 3.4.8
This register can be read or written in 8-bit or 1-bit units.
Reset input sets this register to 00H.
Figure 20-40: Port Emergency Shut Off Status Register 5 (ESOST5))
After reset:
00H
7
ESOST
ESO0ST
5
ESO0ST
0
1
Remarks: 1. Writing the emergency shut off status flag (ESO0ST) is only possible, if the ES0EN bit
of the PESC5 register is cleared (0).
2. The ESO0ST flag can only be cleared by CPU to 0. Setting the ESO0ST flag to 1 is not
possible.
3. The output buffers of P51 to P56 are forcibly disabled as long as ESO0EN and ESO0ST
of the PESC5 register are set to 1.
Chapter 20 Port Functions
R/W
Address:
6
5
0
0
No emergency shut off was triggered
Emergency shut off of output ports P51 to P56 triggered by ESO0 input
User's Manual U16580EE3V1UD00
Specific registers.
FFFFF88AH
4
3
0
0
Emergency Shut Off Status
2
1
0
0
0
0
917
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