Caution:
Do not read- or write-access any registers by software between setting the EFSD bit
and clearing the GOM bit.
Chapter 18 AFCAN Controller
Figure 18-56: Normal shutdown process
START
START
INIT mode
INIT mode
Clear GOM bit
Clear GOM bit
GOM = 0?
GOM = 0?
Shutdown successful
Shutdown successful
Shutdown successful
GOM = 0, EFSD = 0
GOM = 0, EFSD = 0
GOM = 0, EFSD = 0
END
END
Figure 18-57: Forced shutdown process
START
START
Set EFSD bit
Set EFSD bit
Clear GOM bit
Clear GOM bit
No
No
GOM = 0?
GOM = 0?
Yes
Yes
Shutdown successful
Shutdown successful
Shutdown successful
GOM = 0, EFSD = 0
GOM = 0, EFSD = 0
GOM = 0, EFSD = 0
END
END
User's Manual U16580EE3V1UD00
No
No
Yes
Yes
Must be a subsequent write
Must be a subsequent write
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