Figure 4-10: Bus Cycle Control Register (Bcc) - NEC V850E/PH2 User Manual

(1) Bus cycle control register (BCC)
This register can be read/written in 16-bit units.
Reset input changes the value of this register to initial setting AAAAH.
Cautions: 1. Idle states cannot be inserted in internal ROM, internal RAM, on-chip peripheral
I/O, or programmable peripheral I/O areas.
2. Write to the BCC register after reset, and then do not change the set value. Also,
do not access an external memory area other than that for this initialization
routine until initial setting of the BCC register is finished. However, it is possible
to access external memory areas whose initialization has been finished.
3. Do not change the settings of bits that are 0 after reset. Otherwise the operation
of the external bus interface cannot be ensured.
After reset: AAAAH
15 14
BCC BC71 0
BCn1
0
1
Remark: When bit BCn1 bit is set to "1", an idle state will be inserted after any read
Remark: n = 0 to 7
Chapter 4 Bus Control Function (μPD70F3187 only)

Figure 4-10: Bus Cycle Control Register (BCC)

R/W
13 12 11 10
BC61 0 BC51 0
Idle State Insertion During CSn Area Access
No insertion
Idle state inserted
access. If an idle state after write access is necessary, the BCWI bit of the DVC
register has to be set additionally.
User's Manual U16580EE3V1UD00
Address: FFFFF48AH
9 8 7 6
BC41 0 BC31 0 BC21
5 4 3 2 1
0 BC11 0 BC01
0
0
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