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The V850E/PH2 microcontrollers feature an on-chip n-channel CAN (Controller Area Network) control-
ler that complies with the CAN protocol as standardized in ISO 11898.
The number of channels is given in the table below:
Channels
Names
Throughout this chapter, the individual channels of CAN are identified by "n", for example, C0GMCTRL
for the CAN0 global control register.
Throughout this chapter, the CAN message buffer registers are identified by "m" (m = 0 to 31), for
example C0MDATA4m for CAN0 message data byte 4 of message buffer register m.
18.1 Features
•
Compliant with ISO 11898 and tested according to ISO/DIS 16845 (CAN conformance test)
•
Standard frame and extended frame transmission/reception enabled
Transfer rate: 1 Mbps max. (if CAN clock input ≥ 8 MHz, for 32 channels)
•
•
32 message buffers per channel
•
Receive/transmit history list function
•
Automatic block transmission function
•
Multi-buffer receive block function
•
Mask setting of four patterns is possible for each channel
Chapter 18 AFCAN Controller
µPD70F3447
CAN0
User's Manual U16580EE3V1UD00
uPD70F3187
1
2
CAN0 to CAN1
739
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