Control Registers; Figure 16-4: Csibn Control Register 0 (Cbnctl0) (1/2) - NEC V850E/PH2 User Manual

16.3 Control Registers

The following registers are used to control CSIB.
• CSIBn control register 0 (CBnCTL0)
• CSIBn control register 1 (CBnCTL1)
• CSIBn control register 2 (CBnCTL2)
• CSIBn status register (CBnSTR)
(1) CSIBn control register 0 (CBnCTL0)
The CBnCTL0 register is a register that controls the CSIB serial transfer operation.
This register can be read or written in 8-bit or 1-bit units.
Reset input sets this register to 01H.
Caution: Be sure to set bit 3 to 0 when written to the CBnCTL0 register.
After reset: 01H
7
CBnCTL0 CBnPWR CBnTXE
CBnPWR
0
1
The CBnPWR bit controls the CSIB operating clock and resets the internal circuit.
Note 1
CBnTXE
0
1
The SOBn serial output pin is fixed to low level and communication is stopped by clearing the
CBnTXE bit to 0.
Note 1
CBnRXE
0
1
When the CBnRXE bit is cleared to 0, no reception complete interrupt is output even when the
prescribed data is transferred in order to stop the receive operation, and the CBnRX register is not
updated.
Notes: 1. Rewrite is possible only when the CBnPWR bit = 0. However, CBnPWR bit = 1 can also be
set at the same time.
2. Not available on μPD70F3447
μPD70F3187:
Remark:
μPD70F3447:
Chapter 16 Clocked Serial Interface B (CSIB)

Figure 16-4: CSIBn Control Register 0 (CBnCTL0) (1/2)

R/W Address:
6 5
Note 1 Note 1
CBnRXE CBnDIR
Stops clock operation and reset the internal circuit
Enables operating clock operation
Stops transmission operation
Enables transmission operation
Stops reception operation
Enables reception operation
n = 0, 1
n = 0
User's Manual U16580EE3V1UD00
CB0CTL0 FFFFFD00H,
CB1CTL0 FFFFFD20H
4 3
Note 1 0
CBnSSE
CSIBn Operation Control
Transmission Operation Enable
Reception Operation Enable
Note 2
2 1
Note 1 Note 1 CBnSCE
CBnTMS
0
649