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(6)
CnCTRL - CANn module control register
The CnCTRL register is used to control the operation mode of the CAN module.
After reset: 0000H
R/W
(a) Read
15
CnCTRL
0
7
CCERC
RSTAT
0
1
Notes: 1. The RSTAT bit is set to 1 under the following conditions (timing)
•
The SOF bit of a receive frame is detected
•
On occurrence of arbitration loss during a transmit frame
2. The RSTAT bit is cleared to 0 under the following conditions (timing)
•
When a recessive level is detected at the second bit of the interframe space
•
On transition to the initialization mode at the first bit of the interframe space
TSTAT
0
1
Notes: 1. The TSTAT bit is set to 1 under the following conditions (timing)
•
The SOF bit of a transmit frame is detected
2. The TSTAT bit is cleared to 0 under the following conditions (timing)
•
During transition to bus-off state
•
On occurrence of arbitration loss in transmit frame
•
On detection of recessive level at the second bit of the interframe space
•
On transition to the initialization mode at the first bit of the interframe space
Chapter 18 AFCAN Controller
Address: CnCTRL <CnRBaseAddr> + 050
14
13
0
0
6
5
AL
VALID
Reception is stopped.
Reception is in progress.
Transmission is stopped.
Transmission is in progress.
User's Manual U16580EE3V1UD00
H
12
11
0
0
4
3
PSMODE
PSMODE
OPMODE
1
0
Reception status bit
Transmission status bit
10
9
0
RSTAT
TSTAT
2
1
OPMODE
OPMODE
2
1
8
0
0
781
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