Figure 16-8: Csibn Status Register (Cbnstr) - NEC V850E/PH2 User Manual

(4) CSIBn status register (CBnSTR)
The CBnSTR register is an 8-bit register that displays the CSIB status.
This register can be read or written in 8-bit or 1-bit units, but the CBnSTF flag is a read-only.
Reset input clears this register to 00H.
In addition to reset input, the CBnSTR register can be initialized by clearing (0) the CBnPWR bit of
the CBnCTL0 register.
After reset: 00H
7
CBnSTR CBnTSF
CBnTSF
0
1
During transmission, this register is set (1) when data is prepared in the CBnTX register,
and during reception, it is set (1) when a dummy read of the CBnRX register is performed.
The clear timing is after the edge of the last clock.
CBnOVE
0
1
• An overrun error occurs when the next reception starts without performing a CPU read
of the value of the CBnRX register upon completion of the receive operation.
In this case the CBnOVE flag displays the overrun error occurrence status, and a
reception error interrupt (INTCBnRE) is generated.
• The CBnOVE flag is cleared by writing 0 to it. It cannot be set even by writing 1 to it.
Note: Not available on μPD70F3447
μPD70F3187:
Remark:
μPD70F3447:
654
Chapter 16 Clocked Serial Interface B (CSIB)

Figure 16-8: CSIBn Status Register (CBnSTR)

R/W Address:
6 5
0 0
Idle status
Operating status
No overrun
Overrun
n = 0, 1
n = 0
User's Manual U16580EE3V1UD00
CB0CTL0 FFFFFD03H,
CB1CTL0 FFFFFD23H
4 3 2
0 0 0
CSIBn Operation Control
Overrun Error Flag
Note
1 0
0 CBnOVE