Operation; Basic Operation - NEC V850E/PH2 User Manual

14.4 Operation

14.4.1 Basic operation

A/D conversion is executed by the following procedure.
<1> The selection of the analog input and specification of the operation mode, trigger mode, etc.
should be specified using the ADMn0, ADMn1 or ADMn2 registers
When the ADCEn bit of the ADMn0 register is set to 1, A/D conversion starts in the A/D trigger
mode. In the timer trigger mode and external trigger mode, the trigger standby state
<2> When A/D conversion is started, the C-array voltage on the analog input side and the C-array volt-
age on the reference side are compared by the comparator.
<3> When the comparison of the 10 bits ends, the conversion results are stored in the ADCRnm
register. When A/D conversion has been performed the specified number of times, the A/D
conversion end interrupt (INTADn) is generated (n = 0, 1), (m = 0 to 9).
Notes: 1. If the setting of the ADMn0, ADMn1 or ADMn2 registers (n = 0, 1) is changed during A/D
conversion, the operation immediately before is stopped, and the result of the conversion is
not stored in the ADCRnm register (m = 0 to 9). The A/D conversion operation is then
initialized, and conversion is executed from the beginning again.
2. During the timer trigger mode and external trigger mode, if the ADCEn bit of the ADMn0
register is set to 1, the mode changes to the trigger standby state. The A/D conversion oper-
ation is started by the trigger signal (ADCSn bit in the ADMn0 register = 1), and the
trigger standby state (ADCSn bit = 0) is returned when the A/D conversion operation ends.
Chapter 14 A/D Converter
User's Manual U16580EE3V1UD00
Note 1
(n = 0, 1).
Note 2
is set.
585