Figure 22-2: Internal Ram Parity Error Address Register (Rampadd) - NEC V850E/PH2 User Manual

(2) Internal RAM parity error address register (RAMPADD)
The RAMPAD register is a 16-bit register that latches the internal RAM address causing the first
parity error after hardware reset was released or RAMERR register was cleared.
This register can be read or written in 16-bit units.
Reset input clears this register to 8000H.
Caution: Do not read the RAMPADD register, when all internal RAM parity error flags RAEn
(n = 0 to 3) are cleared. If a parity error is detected and the RAMPADD register is read
before the respective RAEn flag is set, the read value might be invalid.

Figure 22-2: Internal RAM Parity Error Address Register (RAMPADD)

After reset: 8000H
15 14
RAMPA
RAMPADD 1
DD14
RAMPAD14 to
RAMPADD2
Caution: Bit 15 of the RAMPADD register is always 1. This does not reflect the
Remark: Bits 0 and 1 of the RAMPADD register are always 0, because the parity check
Chapter 22 Internal RAM Parity Check Function
R/W Address:
13 12 11 10
RAMPA RAMPA RAMPA RAMPA RAMPA
DD13 DD12 DD11 DD10 DD9
Internal RAM address of the 32-bit word causing the parity error.
correct address bit 15 of the internal RAM, which starts at location
FFF0000H.
function is aligned on 32-bit words.
User's Manual U16580EE3V1UD00
FFFFF4C2H
9 8 7 6 5
RAMPA RAMPA RAMPA RAMPA
DD8 DD7 DD6 DD5
Internal RAM Parity Error Address
4 3 2 1
RAMPA RAMPA RAMPA
0
DD4 DD3 DD2
0
0
975