•
Operation in error status
Error Status
Error active
Error passive
18.2.4 Error frame
An error frame is output by a node that has detected an error.
R
D
(<4>)
Note: D: Dominant = 0
R: Recessive = 1
No.
Name
<1>
Error flag 1
<2>
Error flag 2
<3>
Error delimiter
<4>
Error bit
<5>
Interframe
space/overload frame
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Chapter 18 AFCAN Controller
Table 18-6: Operation in error status
A node in this status can transmit immediately after a 3-bit
intermission.
A node in this status can transmit 8 bits after the intermission.
Figure 18-15: Error frame
Error frame
<1>
<2>
<3>
6 bits
0 to 6 bits
8 bits
Table 18-7: Definition of error frame fields
Bit count
6
Error active node:
Error passive node:
If another node outputs a dominant level while one node is outputting
a passive error flag, the passive error flag is not cleared until the
same level is detected 6 bits in a row.
0 to 6
Nodes receiving error flag 1 detect bit stuff errors and issues this
error flag.
8
Outputs 8 recessive-level bits consecutively.
If a dominant level is detected at the 8th bit, an overload frame is
transmitted from the next bit.
–
The bit at which the error was detected.
The error flag is output from the bit next to the error bit.
In the case of a CRC error, this bit is output following the ACK
delimiter.
–
An interframe space or overload frame starts from here.
User's Manual U16580EE3V1UD00
Operation
(<5>)
Interframe space or overload frame
Error delimiter
Error flag 2
Error flag 1
Error bit
Definition
Outputs 6 dominant-level bits consecutively.
Outputs 6 recessive-level bits consecutively.