Table 18-23: Message Buffer Register Bit Configuration - NEC V850E/PH2 User Manual

Address Symbol
Note
offset
0H CnMDATA01m
1H
0H CnMDATA0m
1H CnMDATA1m
2H CnMDATA23m
3H
2H CnMDATA2m
3H CnMDATA3m
4H CnMDATA45m
5H
4H CnMDATA4m
5H CnMDATA5m
6H CnMDATA67m
7H
6H CnMDATA6m
7H CnMDATA7m
8H CnMDLCm
9H CnMCONFm
AH CnMIDLm
BH
CH CnMIDHm
DH
EH CnMCTRLm
(W)
FH
EH CnMCTRLm
(R)
FH
Note: Base address: <CnMBaseAddr>
Remark: For calculation of the complete message buffer register addresses refer to "CAN registers
overview" on page 766.
770
Chapter 18 AFCAN Controller

Table 18-23: Message buffer register bit configuration

Bit 7/15 Bit 6/14
OWS RTR
ID7 ID6
ID15 ID14
ID23 ID22
IDE 0
0 0
0 0
0 0
0 0
User's Manual U16580EE3V1UD00
Bit 5/13 Bit 4/12 Bit 3/11
Message data (byte 0)
Message data (byte 1)
Message data (byte 0)
Message data (byte 1)
Message data (byte 2)
Message data (byte 3)
Message data (byte 2)
Message data (byte 3)
Message data (byte 4)
Message data (byte 5)
Message data (byte 4)
Message data (byte 5)
Message data (byte 6)
Message data (byte 7)
Message data (byte 6)
Message data (byte 7)
0
MT2 MT1
ID5 ID4
ID13 ID12
ID21 ID20
0 ID28
0 Clear
MOW
0 0
0 MOW
MUC 0
Bit 2/10 Bit 1/9
MDLC3 MDLC2 MDLC1
MT0 0
ID3 ID2 ID1
ID11 ID10 ID9
ID19 ID18 ID17
ID27 ID26 ID25
Clear Clear Clear
IE DN TRQ
Set IE 0 Set TRQ
IE DN TRQ
0 0
Bit 0/8
MDLC0
0 MA0
ID0
ID8
ID16
ID24
Clear
RDY
Set RDY
RDY
0 0