Can Stop Mode - NEC V850E/PH2 User Manual

(3)
The CAN sleep mode is released by the following events:
• When the CPU writes 00B to the PSMODE[1:0] bits of the CnCTRL register
• A falling edge at the CAN reception pin (CRXDn) (i.e. the CAN bus level shifts from recessive to
dominant)
Caution
After releasing the sleep mode, the CAN module returns to the operation mode from which the CAN
sleep mode was requested and the PSMODE[1:0] bits of the CnCTRL register must be reset by soft-
ware to 00B. If the CAN sleep mode is released by a change in the CAN bus state, the CINTS5 bit of
the CnINTS register is set to 1, regardless of the CIE bit of the CnIE register. After the CAN module is
released from the CAN sleep mode, it participates in the CAN bus again by automatically detecting 11
consecutive recessive-level bits on the CAN bus. The user application has to wait until MBON = 1,
before accessing message buffers again.
When a request for transition to the initialization mode is made while the CAN module is in the CAN
sleep mode, that request is ignored; the CAN module has to be released from sleep mode by software
first before entering the initialization mode.
Caution
2. Always reset the PSMODE[1:0] bits to 00B, when waking up from CAN sleep mode, before
accessing any other registers of the CAN module.
3. Always clear the interrupt flag CINTS5, when waking up from CAN sleep mode.

18.11.2 CAN stop mode

The CAN stop mode can be used to set the CAN Controller to stand-by mode to reduce power con-
sumption. The CAN module can enter the CAN stop mode only from the CAN sleep mode. Release of
the CAN stop mode puts the CAN module in the CAN sleep mode.
The CAN stop mode can only be released (entering CAN sleep mode) by writing 01B to the
PSMODE[1:0] bits of the CnCTRL register and not by a change in the CAN bus state. No message is
transmitted even when transmission requests are issued or pending.
(1)
A CAN stop mode transition request is issued by writing 11B to the PSMODE[1:0] bits of the CnC-
TRL register.
A CAN stop mode request is only acknowledged when the CAN module is in the CAN sleep mode.
In all other modes, the request is ignored.
Caution
824
Chapter 18 AFCAN Controller
Releasing CAN sleep mode
Even if the falling edge belongs to the SOF of a receive message, this
message will not be received and stored. If the CPU has turned off the clock
supply to the CAN module while the CAN module was in sleep mode, even
subsequently the CAN sleep mode will not be released and PSMODE [1:0] will
remain 01B unless the clock to the CAN module is supplied again. In addition
to this, the receive message will not be received after that.
1. Be aware that the release of CAN sleep mode by CAN bus event, and thus
the wake up interrupt may happen at any time, even right after requesting
sleep mode, if a CAN bus event occurs.
Entering CAN stop mode
To set the CAN module to the CAN stop mode, the module must be in the CAN
sleep mode. To confirm that the module is in the sleep mode, check that the
PSMODE[1:0] bits = 01B, and then request the CAN stop mode. If a bus
change occurs at the CAN reception pin (CRXDn) while this process is being
performed, the CAN sleep mode is automatically released. In this case, the
CAN stop mode transition request cannot be acknowledged.
User's Manual U16580EE3V1UD00