One-Shot Pulse Output Operation - NEC 78K0 Series User Manual

8-bit single-chip microcontrollers
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7.4.7 One-shot pulse output operation

A one-shot pulse can be output by setting bits 3 and 2 (TMC0n3 and TMC0n2) of the 16-bit timer mode control
register 0n (TMC0n) to 01 (free-running timer mode) or to 10 (clear & start mode entered by the TI00n pin valid edge)
and setting bit 5 (OSPE0n) of 16-bit timer output control register 0n (TOC0n) to 1.
When bit 6 (OSPT0n) of TOC0n is set to 1 or when the valid edge is input to the TI00n pin during timer operation,
clearing & starting of TM0n is triggered, and a pulse of the difference between the values of CR00n and CR01n is
output only once from the TO0n pin.
Cautions 1. Do not input the trigger again (setting OSPT0n to 1 or detecting the valid edge of the TI00n
pin) while the one-shot pulse is output. To output the one-shot pulse again, generate the
trigger after the current one-shot pulse output has completed.
2. To use only the setting of OSPT0n to 1 as the trigger of one-shot pulse output, do not change
the level of the TI00n pin or its alternate function port pin. Otherwise, the pulse will be
unexpectedly output.
Remarks 1. For the setting of the I/O pins, see 7.3 (5) Port mode register 0 (PM0).
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
Figure 7-48. Block Diagram of One-Shot Pulse Output Operation
TI00n edge detection
OSPT0n bit
OSPE0n bit
Count clock
TMC0n3, TMC0n2
µ
Remark n = 0:
PD78F0531, 78F0532, 78F0533
µ
n = 0, 1:
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Timer counter
Operable bits
Compare register
Preliminary User's Manual U17260EJ3V1UD
Clear
(TM0n)
Match signal
Compare register
(CR00n)
Match signal
(CR01n)
Interrupt signal
(INTTM00n)
Output
TO0n pin
controller
Interrupt signal
(INTTM01n)
225

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