NEC V850E/PH2 User Manual page 355

(a) TRnCCR0 register rewrite operation in high-accuracy T-PWM mode
When rewriting the TRnCCR0 register in the batch rewrite mode, the output waveform changes
according to whether reload occurs at a peak or at a valley (TRnICE = 1, TRnIOE = 1 settings).
Counter
Rewrite in <1> interval (rewrite during up count)
Since the next reload timing becomes the peak point, the cycle on the down count side changes
and an asymmetrical triangular waveform is output. Also, since the cycle changes, reset the duty
value as necessary.
Counter
Reloadable timing
TRnCCR0
TRnCCR0
buffer
TRnCCR1
TRnCCR1
buffer
TORn1
TORn2
INTTRnCD
INTTRnOD
Remark: d1: TRnDTC1 setting value
Chapter 10 16-bit Inverter Timer/Counter R
<1>
"m" d1
"i"
"m" "n"
"m"
"i"
"k"
"i"
User's Manual U16580EE3V1UD00
<2> <1>
"n d1" value loaded to counter
"k" "k" "k"
"n"
"k"
<2>
"k" "k" "k"
355